Pii: S0026-2692(99)00104-4

In this paper, a voltage mode variable gain amplifier (VGA) is presented. A fully differential implementation is used to suppress the common mode noise and increase the dynamic range. The gain of the proposed VGA can be digitally controlled from 0 to 53 dB, with a 1 dB resolution. The gain control is performed in two stages; coarse control with a 6 dB resolution and fine control with a 1 dB resolution. Simulation shows that the bandwidth is about 15 MHz at the maximum gain (53 dB). The differential output third intercept point (OIP3) is 4 V. q 1999 Elsevier Science Ltd. All rights reserved. Keywords: Voltage mode variable gain amplifier; Gain control; Differential output third intercept point 1. Introduction Variable gain amplifiers (VGAs) are used in many applications in order to maximize the dynamic range of an overall system. Hearing aids [1], disk drives [2,3], and wireless communications are examples of such systems [4]. In a wireless communication system, the portability of the terminal implies that the received signal has a very wide dynamic range. This necessitates the use of an automatic gain control (AGC) circuit to automatically control the gain of the receive path so that the signal processed by the baseband circuitry appears to be of a constant power. The AGC contains two blocks: a variable gain amplifier (VGA) and the power detector which feeds back the control signal used to adjust the gain of the VGA. In modern wireless systems, all of the baseband signal processing is implemented digitally by a DSP processor. Hence, a primary requirement of the VGA is to be digitally controlled. Another requirement is that the gain should increase linearly on the decibel scale in order to achieve a wide gain control. 2. Circuit description The block diagram of the proposed VGA is shown in Fig. 1. It consists of three stages: the input stage; the gain stage; and the output stage. The function of the input stage is to convert the differential input voltage into a differential current. This differential current is amplified by the gain stage where the gain is controlled from 0 to 48 dB in a 6 dB step via the digital control inputs D0 through Dn. Finally the differential output current of the gain stage is converted back into the differential voltage through the output stage. The gain of the output stage can be controlled from 0 to 5 dB with a 1 dB step. 2.1. The input stage: voltage to current converter The circuit schematic of the input stage is shown in Fig. 2. By applying KCL at node a, I 1 ˆ IM2 2 IM3 ˆ IM6 2 IM4 ˆ IR1 : …1† Similarly I 1 ˆ IM13 2 IM12 ˆ IM7 2 IM9 ˆ 2IR1 : …2† Because of the feedback loop formed from the transistor M5 and the transconductance amplifier A1, the voltage Va is equal to V I : Similarly the voltage Vb is equal to V 2 I : Then, IR1 ˆ Va 2 Vb 2R1 ˆ VId 2R1 …3† I1d ˆ I 1 2 I 1 ˆ VId R1 …4† Microelectronics Journal 31 (2000) 139–146 Microelectronics Journal MEJ 676 0026-2692/00/$ see front matter q 1999 Elsevier Science Ltd. All rights reserved. PII: S0026-2692(99)00104-4 www.elsevier.com/locate/mejo * Corresponding author. E-mail address: [email protected] (A.M. Soliman) R1 ˆ RP1 1 RM10 …5† where RP1 is the polysilicon resistor and RM10 the equivalent large signal resistance of the transistor M10. The purpose of adding this resistance is to obtain a gain which is independent of the process and temperature variations as explained in Section 2.3. The transconductance amplifiers A1 and A2 are implemented using the traditional differential pair with an active load as shown in Fig. 3. The gain of the amplifier is given by: Voltage gain ˆ gM16…ro16==ro18† …6† where gM16 is the transconductance of the transistor M16, ro16 and ro18 are the output resistances of the transistors M16 and M18, respectively. This voltage gain is high enough to make the two input voltages virtually at the same potential as assumed in Eq. (3). 2.2. The gain stage In this stage, the differential currents I 1 and I 2 1 are amplified using current mirrors. The gain stage consists of n current gain cells. Fig. 4 shows the circuit schematic of one such cell. The relative aspect ratios are shown beside each transistor. Cascode transistors are used to increase the output resistance and reduce the gain error. This allows us to use transistors with smaller L and hence reducing its effective capacitance and increasing the bandwidth. Also, cascode transistors are used for switching the current. A.A. El-Adawy et al. / Microelectronics Journal 31 (2000) 139–146 140 Voltage to Current Converter Current Gain Current to Voltage Converter V I + V I I1 + I1 I2 + I2 V O +